Semiconductor wafers are processed into integrated circuit chips. Wafer containers hold wafers during transport from the original manufacture of the wafers to fabrication facilities, and in between processing steps in the fabrication facilities. The wafers go through dozens or hundreds of processing steps to the final integrated circuit product. The wafers are extremely fragile and expensive. The more processing steps that wafers have undergone, the greater the investment, the greater the value in the wafers, and the greater the loss if damaged.
Wafers may be of various sizes up to 300 mm in diameter and development of equipment for 450 mm wafers is being developed. These containers are required to protect the wafers from contaminants and damage, both during transport of the containers with the wafers, and during loading and unloading steps of the wafers, and during closure of the wafers. The wafers are generally supported in containers that support the wafers only by their edges. Wafer containers, particularly for 300 mm wafers are known as FOUPS and FOSBS, acronyms for “front opening unified pod” and “front opening shipping box”. These front opening containers have a front opening container portion and a door that closes the front opening and latches onto the container portion. The wafers are supported by shelves in the container portion positioned at the two sides of the container. The wafers are also supported forwardly and rearwardly by wafer supports (also termed wafer restraints) in which the wafer edges seat in V-shaped or U-shaped recesses in the forward and rearward supports with the supports providing a compressive force on the forward and rearward edge. The wafer supports may be cushions that have thin polymer springs connecting to wafer edge engagement portions for providing resilient support of the wafer edges. In FOUPS, the wafers will typically be elevated off of the shelves and supported only by the forward and rearward supports during shipment. The wafer edge engagement portions are “spring supported”. By industry convention, an x-y-z coordinate system is applied to FOUPS and FOSBS with the insertion and retraction direction being associated with the z direction, the vertical direction being associated with the x direction, and lateral, left and right directions being associated with the y direction. FOSBS may be rotated 90 degrees rearwardly for shipping with the wafers suspended vertically between the front and rearward wafer supports and the coordinate systems rotates with the FOSBS.
Demand from consumers and product manufacturers, as well as manufacturing cost efficiencies, have driven downwardly the size and thickness of integrated circuits. This is reflected at the wafer processing level by increased “circuit density” and reduced thicknesses. the reduced thicknesses, particularly in large wafer sizes, such as 300 mm, equates to greater demands on protecting the wafers particularly during transportation of the loaded wafer container. For example, the thinner wafers will deflect more than thicker wafers during shock conditions and have a greater fragility. This creates greater demands of the forward and rearward supports. For example, they may need greater range of movement and toward and away from the wafer (z direction) and more delicate support, which includes less compressive force on the wafer.
Generally, improvements in the capability of forward and/or rearward wafer supports to effectively support thinner wafers in front opening wafer containers would be well received.
Most recently, very thin wafers that are not capable of effectively supporting themselves are bonded to a carrier substrate so that the very thin wafers can be processed and handled. The “bonded wafer” thus has a carrier substrate side and face and a thinned wafer side and face. In such bonded wafers, the very thin wafer is eventually separated from the carrier substrate before being finally transformed into the integrated circuits. The carrier substrate may be supported by its edge with the thinned wafer edge offset inwardly from the carrier substrate edge. Forward and/or rearward wafer supports configured particularly to support and protect these bonded wafers are needed.